IBM develops ‘instantaneous’ memory, 100x faster than flash

July 1, 2011

IBM Press Release

Made in IBM Labs: IBM Scientists Demonstrate Memory Breakthrough for the First Time

• Reliable multi-bit phase-change memory technology demonstrated
• Scientists achieved a 100 times performance increase in write latency
compared to Flash
• Enables a paradigm shift for enterprise IT and storage systems,
including cloud computing by 2016

ZURICH, June 30, 2011 – For the first time, scientists at IBM Research have
demonstrated that a relatively new memory technology, known as phase-change
memory (PCM), can reliably store multiple data bits per cell over extended
periods of time. This significant improvement advances the development of
low-cost, faster and more durable memory applications for consumer devices,
including mobile phones and cloud storage, as well as high-performance
applications, such as enterprise data storage. With a combination of
speed, endurance, non-volatility and density, PCM can enable a paradigm shift for enterprise IT and storage systems within the next five years.

Scientists have long been searching for a universal, non-volatile memory
technology with far superior performance than Flash – today’s most
ubiquitous non-volatile memory technology. The benefits of such a memory
technology would allow computers and servers to boot instantaneously and
significantly enhance the overall performance of IT systems. A promising
contender is PCM that can write and retrieve data 100 times faster than
Flash, enable high storage capacities and not lose data when the power is
turned off. Unlike Flash, PCM is also very durable and can endure at least
10 million write cycles, compared to current enterprise-class Flash at
30,000 cycles or consumer-class Flash at 3,000 cycles. While 3,000 cycles
will out live many consumer devices, 30,000 cycles are orders of magnitude
too low to be suitable for enterprise applications. (see chart for
comparisons).

“As organizations and consumers increasingly embrace cloud-computing models
and services, whereby most of the data is stored and processed in the
cloud, ever more powerful and efficient, yet affordable storage
technologies are needed,” states Dr. Haris Pozidis, Manager of Memory and
Probe Technologies at IBM Research – Zurich. “By demonstrating a multi-bit
phase-change memory technology which achieves for the first time
reliability levels akin to those required for enterprise applications, we
made a big step towards enabling practical memory devices based on
multi-bit PCM.”

Multi-level Phase Change Memory Breakthrough

To achieve this breakthrough demonstration IBM scientists in Zurich used
advanced modulation coding techniques to mitigate the problem of short-term
drift in multi-bit PCM, which causes the stored resistance levels to shift
over time, which in turn creates read errors. Up to now, reliable retention
of data has only been shown for single bit-per-cell PCM, whereas no such
results on multi-bit PCM have been reported.

PCM leverages the resistance change that occurs in the material — an alloy
of various elements — when it changes its phase from crystalline –
featuring low resistance – to amorphous – featuring high resistance – to
store data bits. In a PCM cell, where a phase-change material is deposited
between a top and a bottom electrode, phase change can controllably be
induced by applying voltage or current pulses of different strengths.
These heat up the material and when distinct temperature thresholds are
reached cause the material to change from crystalline to amorphous or vice
versa.

In addition, depending on the voltage, more or less material between the
electrodes will undergo a phase change, which directly affects the cell’s
resistance. Scientists exploit that aspect to store not only one bit, but
multiple bits per cell. In the present work, IBM scientists used four
distinct resistance levels to store the bit combinations “00”, “01” 10″ and
“11”.

To achieve the demonstrated reliability, crucial technical advancements in
the “read” and “write” process were necessary. The scientists implemented
an iterative “write” process to overcome deviations in the resistance due
to inherent variability in the memory cells and the phase-change materials:
“We apply a voltage pulse based on the deviation from the desired level and
then measure the resistance. If the desired level of resistance is not
achieved, we apply another voltage pulse and measure again – until we
achieve the exact level,” explains Pozidis.

Despite using the iterative process, the scientists achieved a worst-case
write latency of about 10 microseconds, which represents a 100x performance
increase over even the most advanced Flash memory on the market today.

For demonstrating reliable read-out of data bits, the scientists needed to
tackle the problem of resistance drift. Because of structural relaxation
of the atoms in the amorphous state, the resistance increases over time
after the phase change, eventually causing errors in the read-out. To
overcome that issue, the IBM scientists applied an advanced modulation
coding technique that is inherently drift-tolerant. The modulation coding
technique is based on the fact that, on average, the relative order of
programmed cells with different resistance levels does not change due to
drift.

Using that technique, the IBM scientists were able to mitigate drift and
demonstrate long- term retention of bits stored in a subarray of 200,000
cells of their PCM test chip, fabricated in 90-nanometer CMOS technology.
The PCM test chip was designed and fabricated by scientists and engineers
located in Burlington, Vermont; Yorktown Heights, New York and in Zurich.
This retention experiment has been under way for more than five months,
indicating that multi-bit PCM can achieve a level of reliability that is
suitable for practical applications.

The PCM research project at IBM Research – Zurich will continue to be
studied at the recently opened Binnig and Rohrer Nanotechnology Center.
The center, which is jointly operated by IBM and ETH Zurich as part of a
strategic partnership in nanosciences, offers a cutting-edge
infrastructure, including a large cleanroom for micro- and nanofabrication
as well as six “noise-free” labs, especially shielded laboratories for
highly sensitive experiments.

Thanks to IBM Press release

 

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New features of RPG in V7R1

April 23, 2010

 The following are the new features of RPG in V7R1

1) Open access

2) Sorting and searching data in Data Structure Arrays

3) New operation extenders

4) %Lookup works with Datastructure Array

5) New BIF %SCANRPL

6) No need to have prototypes for subprocedures that are internal to the module

7) New keyword RTNPARM on the (Procedure Interface level) PI level

8)  ALIAS Longer names defined in DDS /SQL can be accessed in RPG

Sorting and searching data in Data Structure Arrays

Open Access

Now using file manipulation opcodes ( READ, WRITE, CHAIN, EXFMT ) we can access the data that is available not only on the 5250 stream. We can access from browser , Handhelp devices..etc..

For that we need to write the program which handles the request made by the RPG program and these are called “ Handlers

We can have now sort the data in the Data Structure

Example:

 D InvoiceInfo     DS                  Dim(1000)

 D                                           Qualified

 D  Invoice#                       8    

 D  Invdate                          D     

 D  InvAmt                       12p 2  

    // If wanted to SortByName

      SortA  InvoiceInfo(*).Invoice;

    //If wanted to SortBy InvAmt

      SortA  InvoiceInfo(*).InvAmt;

The * indicates the level at which the sorting should occur. Of course, in this example, it’s pretty obvious, since it’s the only level where sorting is possible. But this sorting capability also works with nested Data Structures, so even very complicated structures can be sorted.

Two new operation extenders are available for SORTA

SORTA(A) –  for ascending

SORTA(D) – for descending

%Lookup works with Datastructure Array

Example:

Index = %LookUp( ‘ABC’: InvoiceInfo(*).Invoice#);

New BIF %SCANRPL ( To scan and replace )

This BIF is combination of %SCAN and %REPLACE


IBM Announcing POWER7

February 13, 2010

 

Today (8th Feb, 2010) IBM is announcing the first of the POWER7 processor-based systems that, compared to POWER6, deliver four times the energy efficiency and twice the performance at the same or better price. Simply put, this is one of those rare breakthrough announcements that delivers a massive leap in system technology. And, yes, IBM i is right at the center of the POWER7 action! We’re announcing three new systems that support IBM i. The Power 750 is a midrange business server that’s ENERGY STAR qualified and offers up to 32 POWER7 cores with up to 181,000 CPW. The Power 770 extends the very successful 570 modular enterprise server, with up to 64 POWER7 cores and up to 292,000 CPW. The third new server, the Power 780, introduces a new category of scalable high-end servers, with up to 64 POWER7 cores, up to 343,000 CPW and a new TurboCore option for optimal throughput. IBM is making a statement of direction that we will deliver a high-end server in 2010 that will offer up to 256 cores — remarkably in the same physical footprint and energy envelope as the current POWER6 Power 595. For the many mid-sized companies using the Power 520 server, IBM is also making a statement of direction that we will provide upgrade paths in 2010 from the POWER6 Power 520 2- and 4-core servers to next generation of POWER7 processor-based entry servers. The POWER7 processor features a multi-core design with up to 8 cores per socket, ranging between 3.0 and 4.14 GHz, and delivering more performance per core with greater energy efficiency than POWER6. Compare a Power 550 5.0 GHz POWER6 with 8 cores versus a Power 750 at 3.3 GHz with 8 cores, for example, and you get 26 percent more CPW performance. Or compare a Power 570 5.0 GHz POWER6 with 16 cores, versus a Power 780 at 3.86 GHz, and you get 35 percent more CPW performance. Impressive. Note that POWER7 is the first Power processor generation to support all of our tier-one operating systems — AIX, IBM i and Linux — up front. And since IBM i 6.1.1 — which we announced last October — is supported with POWER7, we already have thousands of applications ready to run. And, with IBM i 7.1 coming soon, this year looks to be a great one for IBM i users.

Written by Ian Jarman, Power Systems Software manager.


RPG Open in Version 7.1

November 16, 2009

There are the ground breaking enhancements of RPG in 7.1 release.

Feature 1 ) RPG to access non DB2 database like ORACLE, MySql…

Feature 2) RPG to interface with browser applications , XML or mobile devices. So no need to buy/install the modernization product to make your green screen applications are web enable.

RPG Open will do that for you in native way.

This is the step to take RPG to next level.

These are the enhancement we will be wanting from IBM.

So Let’s wait for it announcement on 2010 & Let RPG talk to web browser directly.

Happy RPGing!!!


Its time to move away from IBM i and RPG! Ans: “NO”

September 5, 2009

Click here to read…

Its time to move away from IBM i and RPG!


Power7 Processor

July 28, 2009

IBM this week revealed details about its upcoming Power7 processor, confirming that it will be a 45-nanometer chip with 4, 6 or 8 cores. Each core will have up to 4 computing threads, meaning there could be up to 32 threads on a single Power7 chip.

The Power7 processor is expected out next year, with Steve Sibley, IBM Power Systems platform manager, saying IBM will try to get it out by mid-year. Other details on the chip: It will use DDR3 memory, have expanded cache and included embedded DRAM. Sibley wouldn’t disclose clock speeds but it is expected to be in the 3-4 GHz range. He said more details will come out at the HotChips conference next month in California.

Assuming the Power 595 server will retain its current architecture of up to 32 sockets, that means with Power7 chips it could have up to 256 processor cores and 1,024 computing threads.

Of course, IBM doesn’t want its Power Systems customers to wait around until the Power7 is released. So it announced a swap program. Users who have or buy a Power 570 or a Power 595 box now will be able to swap the Power7 processor book in for the Power6 or Power6+ processors they have there now. When I asked why lower-end systems weren’t involved in the swap program, Sibley said there is less interest among users in upgrading lower-end systems. When those servers get outdated, he said, end users tend to just move them to test and development environments.

Part of IBM’s goal is obviously to prevent the sales lull that often comes before a new chip release, but it also gives users options for buying now and swapping later without switching up the box’s serial number. In addition, swapping in the Power7 chips will not cost as much as buying a whole new box, though IBM hasn’t released any prices. Finally, the swap program is back-dated, so you don’t need to buy a box right now to get the swap. If you have a Power6 or Power6+ 570 or 595 now, you will be eligible for a serial-number protecting upgrade.

( Source: itknowledgeexchange.com)